1. Field of the Invention
The present invention relates to a master mold used in soft-lithography, a master mold fabrication method, and a method for fabricating a liquid crystal display device using the same. More particularly, the present invention relates to a master mold, a master mold fabrication method, and a method for fabricating a liquid crystal display device using the same, whereby a rate of defects occurring during fabrication processes may be decreased.
2. Discussion of the Related Art
Liquid crystal display (LCD) devices are a type of flat panel display device and are increasingly used in visual information transmission media. Accordingly, various types of LCD devices are being developed. LCD devices are desirable because they consume a low amount of power, have a compact construction, are light in weight, and have a superior image quality.
LCD devices are also produced in great quantities to be used in various applications such as TV sets, vehicle navigation systems and computer monitors. LCD devices are also considered to be substitutes for cathode ray tubes (CRTs).
In general, an LCD device supplies a data signal based upon image information to liquid crystal cells arranged in a matrix. Thereby, desired images are displayed by adjusting a light transmissivity of the liquid crystal cells.
FIG. 1 shows an exploded view of a related art LCD device, a schematic construction of the LCD device will now be explained.
As shown in FIG. 1, a related art LCD device includes a color filter substrate 113 as an upper substrate, a thin film transistor (TFT) array substrate 101 as a lower substrate, and a liquid crystal layer 109.
The color filter substrate 113 includes color filters 117, a black matrix (BM) 115 disposed between each color filter 117, and a common electrode 111 formed at a lower side of the color filter substrate 113.
The TFT array substrate 101 includes pixel electrodes 107 formed in each pixel region P, TFTs used as switching devices, gate lines 103 and data lines 105. The TFTs are formed in a matrix at each crossing of a gate line 103 and a data line 105. The pixel regions P are formed at each region between the gate line 103 and the data line 105. The pixel electrode 107 may be a transparent conductive layer.
The liquid crystal layer 109 is formed between the color filter substrate 113 and the TFT array substrate 101, and includes a liquid crystal material having optical anisotropy with respect to an optical refractive index.
LCD devices may also include polarizers (not shown) contacting surfaces of both the upper and lower substrates of an LCD panel. A lower portion of a polarizer on the lower substrate may include a back light unit (not shown) having a lamp and optical sheets. LCD devices may also include top and bottom cases (not shown) that support the LCD panels.
FIG. 2 shows a sectional structure of a related art TFT array substrate in a related art LCD device.
The TFT array substrate of the related art LCD device, as shown in FIG. 2, is constructed such that a gate electrode 203 is formed on the substrate 201. A gate insulating layer 205, an activation layer pattern 207 and ohmic contact layers 209a and 209b are sequentially deposited on the gate electrode 203, such that the insulating layer 205 is interposed between the gate electrode 203 and the activation layer pattern 207.
Source and drain electrodes 211a and 211b may be formed on the ohmic contact layers 209a and 209b to partially or wholly overlap the ohmic contact layers 209a and 209b. 
An intermediate layer 213 is formed on the source and drain electrodes 211a and 211b to partially expose the drain electrode 211b. A transparent pixel electrode 215 is formed on the intermediate layer 213 and connects to the exposed drain electrode 211b. 
A process for fabricating the related art LCD device having such a construction requires forming various patterns. Photolithographic techniques are generally used in the processes.
A method for fabricating a related art TFT array substrate using a related art photolithographic technique will now be explained with reference to FIGS. 3A through 3G.
As shown in FIGS. 3A, 3B and 3C, a first metal layer 303a (e.g., an aluminum (Al)) is formed on an insulating substrate 301 (e.g., glass), and a photolithography technique is used to form the gate electrode 303.
The photolithography technique may be performed such that a photo-resist is coated on the first metal layer 303a to form a photo-resist layer 305a. Then, an exposing process is performed using a first photo mask 307. The first photo mask 307, as shown in FIG. 3A, includes a transmitting region A and a shielding region B. Light transmitted through the transmitting region A exposes and chemically changes the photo-resist layer 305a. The chemical change in the photo-resist layer 305a is different depending on the type of photo-resist material. The exposed portion of a positive photo-resist material is removed by a development solution, whereas the non-exposed portion of a negative photo-resist material is removed by the development solution. As shown, a positive photo-resist is used.
When the exposed portion of the photo-resist 305a is removed by the development solution, the photo-resist pattern 305 is formed on the first metal layer 303a as shown in FIG. 3B. The first metal layer 303a is etched using the photo-resist pattern 305 as a mask. Upon removing residual photo-resist pattern 305, a gate electrode 303 having the shape of the photo-resist pattern 305 is formed as shown in FIG. 3C.
As shown in FIG. 3D, a gate insulating layer 309 may be formed on the substrate 301 including the gate electrode 303, and then an activating layer pattern 311 and an ohmic contact layer 313 are sequentially formed on the gate insulating layer 309. The gate insulating layer 309 may be formed of silicon dioxide (SiO2) or silicon nitride (SiNx). The activating layer pattern 311 may be formed of pure amorphous silicon and the ohmic contact layer 313 may be formed of amorphous silicon in which impurities have been doped. Then, the activating layer pattern 311 and the ohmic contact layer 313 are patterned by the photolithography technique used in forming the gate electrode 303. Here, a second photo mask (not shown) is used in the photolithography technique. Ohmic contact patterns 313a and 313b are thus formed.
As shown in FIG. 3E, source and drain electrodes 315a and 315b are formed. In this process, a second metal layer such as an aluminum (Al) or molybdenum (Mo) is formed on the substrate 301 including the activating layer pattern 311 and the ohmic contact patterns 313a and 313b. Then, the photolithography technique is performed on the second metal layer using a third photo mask (not shown). As a result, a source electrode 315a and a drain electrode 315b are formed on the ohmic contact patterns 313a and 313b to be spaced apart from each other by an interval.
As shown in FIG. 3F, an intermediate layer 317 is formed on the substrate 301 including the source and drain electrodes 315a and 315b. A contact hole 319 is formed on the intermediate layer 317 and partially exposes the lower drain electrode 315b. The photolithography technique and a fourth photo mask (not shown) are used to form the contact hole 319.
As shown in FIG. 3G, a pixel electrode 321 is formed on the intermediate layer 317. The pixel electrode 321 may be made of a transparent conductive layer, such as indium tin oxide or indium zinc oxide. The photolithography technique is used to pattern the transparent conductive layer to thereby form the pixel electrode 321. The pixel electrode 321 may be connected to the drain electrode 315b via the contact hole 319 formed on the intermediate layer 317.
Thus, the related art TFT array substrate included in a related art LCD device is fabricated using the aforementioned processes. In the processes, the photolithography technique is used five times, namely, in the forming of the gate electrode 303, then in the forming of the ohmic contact patterns 313a and 313b, then in the forming of the source/drain electrodes 315a and 315b, then in the forming of the contact hole 319 and finally in the forming of the pixel electrode 321.
However, the photolithography techniques require expensive photo masks and complicated processes such as exposing and developing processes. Thus, excessive processing costs result. Also, it is difficult to manage the production yield of the LCD devices.